Commits · 31d63dd8ad4ecac0b83e233cca289a9115edfba4 · rocoelec / rocoelectrical

Nov 11, 2019
- update README · fb5a18e3
  Jingyan Ling authored 5 years ago
  
  fb5a18e3
Sep 04, 2019
- temp finish prototyping, start on paper · da0f0755
  Jingyan Ling authored 5 years ago
  
  da0f0755
Aug 30, 2019
- demo_design · e4119217
  Jingyan Ling authored 5 years ago
  
  e4119217
Aug 29, 2019
- detail bugs, journal for detail · 34674ed8
  Jingyan Ling authored 5 years ago
  
  34674ed8
Aug 27, 2019
- soving brach · c7bfa82d
  Jingyan Ling authored 5 years ago
  
  c7bfa82d
Aug 22, 2019
- editing brach · 5a4e503c
  Jingyan Ling authored 5 years ago
  
  5a4e503c
Aug 20, 2019
- update coding,journal · 59572213
  Jingyan Ling authored 5 years ago
  
  59572213
Aug 17, 2019
- backup for isolation conn · 115e2d6a
  Jingyan Ling authored 5 years ago
  
  115e2d6a
Aug 15, 2019
- update journal and coding for isolation box · 95c1bbc9
  Jingyan Ling authored 5 years ago
  
  95c1bbc9
Aug 14, 2019
- update journal · 1df770c2
  Jingyan Ling authored 5 years ago
  
  1df770c2
Aug 13, 2019
- trace+iso tesing · beca6536
  Jingyan Ling authored 5 years ago
  
  beca6536
- update journal, rearranged package, coding · d569986c
  Jingyan Ling authored 5 years ago
  
  d569986c
Aug 09, 2019
- testing parallel traces · a2a93eb4
  Jingyan Ling authored 5 years ago
  
  a2a93eb4
Aug 06, 2019
- parse wiring info · 0154cc9d
  Jingyan Ling authored 5 years ago
  
  0154cc9d
Aug 01, 2019
- scripting autorouter · bf5c4592
  Jingyan Ling authored 5 years ago
  
  bf5c4592