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Commit bf5c4592 authored by Jingyan Ling's avatar Jingyan Ling
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scripting autorouter

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...@@ -457,7 +457,7 @@ ...@@ -457,7 +457,7 @@
|--load module functions |--load module functions
|--dsn_rule.py |--dsn_rule.py
|--dsn_geo.py |--dsn_geo.py
|--boudary class |--boundary class
|--keepout class |--keepout class
|--load drawing functions |--load drawing functions
|--dsn_net.py |--dsn_net.py
...@@ -507,4 +507,35 @@ ...@@ -507,4 +507,35 @@
- Test on wire width change - Test on wire width change
- ![](journal_media/wider_wire.png) - ![](journal_media/wider_wire.png)
- TODO: Easier API to generate netlist. - TODO: Easier API to generate netlist.
\ No newline at end of file
### 07/31/2019
- Use `dsnwriter` in RoCo
~~~
Mechanical drawings (dxf/svg)------------|
|
Module Footprints -----------------------|
|----> board design (dsn)
Electrical schematic design (netlist)----|
|
Board design details(rules,parameters)---|
----> board design (dsn)----> Auto-router (FreeRouting)----> routed board design (dsn)
----> wiring section ----> drawings with mechanical and electrical design (dxf/svg)
~~~
- The package now can auto-detect padstack information with multiple files
### 08/01/2019
- Scripting Auto-router from python
- Run `.jar` package through python
- Can open GUI with imported file
- Cannot run auto-routing function from script
- Manually click on auto-routing and save is needed (manual approval)
\ No newline at end of file
from skidl import Pin, Part, SchLib, SKIDL, TEMPLATE
SKIDL_lib_version = '0.0.1'
__init___lib = SchLib(tool=SKIDL).add_parts(*[
Part(name='NodeMCU_1.0_',dest=TEMPLATE,tool=SKIDL,ref_prefix='U',num_units=1,do_erc=True,footprint='ESP8266:ESP12F-Devkit-V3',pins=[
Pin(num='1',name='A0(ADC0)',do_erc=True),
Pin(num='10',name='GND',do_erc=True),
Pin(num='11',name='3.3V',func=Pin.PWROUT,do_erc=True),
Pin(num='12',name='EN',do_erc=True),
Pin(num='13',name='RST',do_erc=True),
Pin(num='14',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='15',name='VIN',func=Pin.PWRIN,do_erc=True),
Pin(num='16',name='3.3V',func=Pin.PWROUT,do_erc=True),
Pin(num='17',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='18',name='TX(GPIO1)',func=Pin.BIDIR,do_erc=True),
Pin(num='19',name='RX(DPIO3)',func=Pin.BIDIR,do_erc=True),
Pin(num='2',name='RSV',do_erc=True),
Pin(num='20',name='D8(GPIO15)',func=Pin.BIDIR,do_erc=True),
Pin(num='21',name='D7(GPIO13)',func=Pin.BIDIR,do_erc=True),
Pin(num='22',name='D6(GPIO12)',func=Pin.BIDIR,do_erc=True),
Pin(num='23',name='D5(GPIO14)',func=Pin.BIDIR,do_erc=True),
Pin(num='24',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='25',name='3.3V',func=Pin.PWROUT,do_erc=True),
Pin(num='26',name='D4(GPIO2)',func=Pin.BIDIR,do_erc=True),
Pin(num='27',name='D3(GPIO0)',func=Pin.BIDIR,do_erc=True),
Pin(num='28',name='D2(GPIO4)',func=Pin.BIDIR,do_erc=True),
Pin(num='29',name='D1(GPIO5)',func=Pin.BIDIR,do_erc=True),
Pin(num='3',name='RSV',do_erc=True),
Pin(num='30',name='D0(GPIO16)',func=Pin.BIDIR,do_erc=True),
Pin(num='4',name='SD3(GPIO10)',func=Pin.BIDIR,do_erc=True),
Pin(num='5',name='SD2(GPIO9)',func=Pin.BIDIR,do_erc=True),
Pin(num='6',name='SD1(MOSI)',func=Pin.BIDIR,do_erc=True),
Pin(num='7',name='CMD(CS)',func=Pin.BIDIR,do_erc=True),
Pin(num='8',name='SDO(MISO)',func=Pin.BIDIR,do_erc=True),
Pin(num='9',name='CLK(SCLK)',func=Pin.BIDIR,do_erc=True)]),
Part(name='MPU-9250',dest=TEMPLATE,tool=SKIDL,keywords='connector',ref_prefix='J',num_units=1,fplist=['Connector*:*_1x??_*'],do_erc=True,footprint='ESP8266:mpu-9250',pins=[
Pin(num='1',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='10',name='FSYNC',func=Pin.PASSIVE,do_erc=True),
Pin(num='2',name='GND',func=Pin.PASSIVE,do_erc=True),
Pin(num='3',name='SCL',func=Pin.PASSIVE,do_erc=True),
Pin(num='4',name='SDA',func=Pin.PASSIVE,do_erc=True),
Pin(num='5',name='EDA',func=Pin.PASSIVE,do_erc=True),
Pin(num='6',name='ECL',func=Pin.PASSIVE,do_erc=True),
Pin(num='7',name='ADO',func=Pin.PASSIVE,do_erc=True),
Pin(num='8',name='INT',func=Pin.PASSIVE,do_erc=True),
Pin(num='9',name='NCS',func=Pin.PASSIVE,do_erc=True)]),
Part(name='1000',dest=TEMPLATE,tool=SKIDL,description='Resistor',keywords='R res resistor',ref_prefix='R',num_units=1,fplist=['R_*'],do_erc=True,footprint='Resistor_SMD:R_0402_1005Metric',pins=[
Pin(num='1',name='~',func=Pin.PASSIVE,do_erc=True),
Pin(num='2',name='~',func=Pin.PASSIVE,do_erc=True)])])
\ No newline at end of file
No preview for this file type
No preview for this file type
...@@ -51,7 +51,7 @@ class NetClass(AST): ...@@ -51,7 +51,7 @@ class NetClass(AST):
} }
} }
def __init__(self,net_class_name='default',nets_name=None, def __init__(self,net_class_name='default',nets_name=None,
via_name=None,width=1000,clearance=200.1): via_name='',width=3000,clearance=200.1):
super(NetClass,self).__init__(net_class_name=net_class_name,nets_name=nets_name, super(NetClass,self).__init__(net_class_name=net_class_name,nets_name=nets_name,
via_name=via_name,width=width,clearance=clearance) via_name=via_name,width=width,clearance=clearance)
......
...@@ -16,13 +16,13 @@ ...@@ -16,13 +16,13 @@
(layer_visibility (layer_visibility
not_visible not_visible
(bounds (bounds
0 450 369 162 0 450 359 162
) )
) )
(object_visibility (object_visibility
not_visible not_visible
(bounds (bounds
0 550 405 396 0 550 395 396
) )
) )
(display_miscellanious (display_miscellanious
...@@ -82,7 +82,7 @@ ...@@ -82,7 +82,7 @@
(edit_vias (edit_vias
not_visible not_visible
(bounds (bounds
100 150 413 103 100 150 413 87
) )
) )
(edit_net_rules (edit_net_rules
...@@ -139,10 +139,10 @@ ...@@ -139,10 +139,10 @@
204 204 204 204 204 204
) )
(hilight 1.0 (hilight 1.0
230 255 255 0 0 204
) )
(incompletes 1.0 (incompletes 1.0
255 255 255 0 153 153
) )
(outline (outline
0 0 0 0 0 0
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
(board_frame (board_frame
visible visible
(bounds (bounds
120 27 1150 916 351 29 1150 916
) )
) )
(color_manager (color_manager
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
(object_visibility (object_visibility
not_visible not_visible
(bounds (bounds
0 550 395 396 0 550 405 396
) )
) )
(display_miscellanious (display_miscellanious
...@@ -136,7 +136,7 @@ ...@@ -136,7 +136,7 @@
) )
(colors (colors
(background (background
255 255 255 204 204 204
) )
(hilight 1.0 (hilight 1.0
230 255 255 230 255 255
......
#!/usr/bin/env python3
import dsnwritier
from pykicad import pcb
test=dsnwritier.Dsn()
###############################################################################
##General
layers=[
dsnwritier.Layer('F.Cu'),
dsnwritier.Layer('B.Cu')
]
parsers= dsnwritier.Parser()
rule=dsnwritier.Rule()
clearance=[
dsnwritier.Clearance(200.1),
dsnwritier.Clearance(200.1,'default_smd'),
dsnwritier.Clearance(50,'smd_smd')]
rule.clearance=clearance
###############################################################################
###manually
bdata=[137735, -31864.8, 165736, -31864.8, 165736, -113335, 137735, -113335,
137735, -113864, 160735, -113864, 160735, -151336, 150736, -151336,
150736, -151865, 160735, -151865, 160735, -211335, 150736, -211335,
150736, -211865, 169735, -211865, 169735, -249335, 96264.4,-249335,
96264.4, -211865, 138264, -211865, 138264, -211335, 37264.4, -211335,
37264.4, -151865, 138264, -151865, 138264, -151336, 87264.4, -151336,
87264.4, -113864, 119265, -113864, 119265, -113335, 264.583, -113335,
264.583, -31864.8, 78264.5, -31864.8, 78264.5, -264.632, 137735, -264.632,
137735, -31864.8]
kdata1=[138725, -221865, 138725, -244336, 150275, -244336, 150275, -221865,
138725, -221865]
kdata2=[98235.3, -224531, 98764.5, -224531, 98764.5, -219905, 103236, -224376,
103236, -236824, 98764.5, -241294, 98764.5, -236669, 98235.3, -236669,
98235.3, -242572, 103610, -237198, 103765, -237198, 103765, -237043,
103874, -236933, 103765, -236824, 103765, -224376, 103874, -224266,
103765, -224157, 103765, -224002, 103610, -224002, 98235.3, -218628,
98235.3, -224531]
#############
boundary=dsnwritier.Boundary(bdata)
keepout=[
dsnwritier.Keepout(kdata1),
dsnwritier.Keepout(kdata2)]
###############
image1_outline=[
dsnwritier.module.Outline(width=120,outline_start=[-7620, 11430],outline_end=[7540, 11430]),
dsnwritier.module.Outline(width=120,outline_start=[-7620, 11430],outline_end=[7540, -13570]),
dsnwritier.module.Outline(width=120,outline_start=[-7620, -13570],outline_end=[-7620, -13570]),
dsnwritier.module.Outline(width=120,outline_start=[-7620, -13570],outline_end=[-7620, 11430])]
# image1_outline=[dsnwritier.module.Outline(120)]
image1_pin=[
dsnwritier.module.Pin(1,[-6350, 10160]),
dsnwritier.module.Pin(2,[-6350, 7620])]
image1=dsnwritier.Footprint('U1',image1_outline,image1_pin)
image=[image1]
###############
pin_shape1=[dsnwritier.module.Shape(layer='F.Cu'),
dsnwritier.module.Shape(layer='B.Cu')]
padstack1=dsnwritier.Padstack(shape=pin_shape1,attach='off')
pin_shape2=[dsnwritier.module.Shape(layer='F.Cu',size=800),
dsnwritier.module.Shape(layer='B.Cu',size=800)]
padstack2=dsnwritier.Padstack(pin_type='"Via[0-1]_800:400_um"',shape=pin_shape2,attach='off')
#######################################################################################
###load from library
drawingclass=dsnwritier.load_drawing('/home/jingyan/Documents/summer_intern_lemur/roco_electrical/dsn_line_test.dxf')
ddata=drawingclass.load_polygon()
bdata=ddata[0] #first element is boundary
#############
boundary=dsnwritier.Boundary(bdata)
#############
keepout=[] #load all the rest as outline
for i in range(1,len(ddata)):
kdata=dsnwritier.Keepout(ddata[i])
keepout.append(kdata)
##########
libpath='/home/jingyan/Documents/summer_intern_lemur/roco_electrical/libraries/kicad-ESP8266/ESP8266.pretty/'
image=[dsnwritier.Footprint.from_file(libpath+'mpu-9250.kicad_mod',ref='J1'),
dsnwritier.Footprint.from_file(libpath+'ESP12F-Devkit-V3.kicad_mod',ref='U1')]
padstack=dsnwritier.Padstack.auto_detect(libpath+'mpu-9250.kicad_mod')
##########placement
placement=[dsnwritier.Placement('U1',[103000,48000],orientation=90,name='"DEV"'),
dsnwritier.Placement('J1',[103000,48000],orientation=270,name='"DEV"')]
##############
net1=dsnwritier.Net('3v3',conn_pins=['U1-3','J1-1'])
net2=dsnwritier.Net('VIN',conn_pins='U1-1')
netclass1=dsnwritier.NetClass(net_class_name='default',nets_name=['3v3','GND','VIN'],via_name='Via[0-1]_800:400_um')
########################################################################################
test.parser=parsers
test.layers=layers
test.boundary=boundary
test.keepout=keepout
test.rule=rule
test.placement=placement
test.image=image
test.padstack=padstack
test.net=[net1,net2]
test.netclass=netclass1
test.to_file('testdsn.dsn')
File moved
journal_media/lib_toplevel_class.png

27.5 KiB

journal_media/use_dsn_inroco.png

32.8 KiB

source diff could not be displayed: it is too large. Options to address this: view the blob.
(kicad_pcb
(version 1)
(host pykicad x.x.x)
(general
(nets 5))
(layers
( 32 F.Cu signal)
( 33 Inner1.Cu signal)
( 34 Inner2.Cu signal)
( 35 B.Cu signal)
( 120 Edge.Cuts user)
( 121 B.Mask user)
( 122 F.Mask user)
( 123 B.Paste user)
( 124 F.Paste user)
( 125 B.SilkS user)
( 126 F.SilkS user)
( 127 B.CrtYd user)
( 128 F.CrtYd user)
( 129 B.Fab user)
( 130 F.Fab user))
(net 25 3v3)
(net 26 VIN)
(net 27 GND)
(net_class default ""
(trace_width 1) (add_net 3v3) (add_net VIN) (add_net GND))
(module U1
(layer F.Cu)
(tedit 5B8C418D)
(at 0 0)
(fp_text reference U1
(at 0.6350000000 -1.2700000000)
(layer F.SilkS)
(effects
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(fp_text user USB
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(fp_text user "RF Antenna"
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(angle 90.0000000000)
(layer F.SilkS)
(width 0.1500000000))
(fp_arc
(start -12.0650000000 21.5900000000)
(end -12.0650000000 22.8600000000)
(angle 90.0000000000)
(layer F.SilkS)
(width 0.1500000000))
(pad 1 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -19.0500000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762)
(net 26 VIN))
(pad 2 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -16.5100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 3 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -13.9700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762)
(net 25 3v3))
(pad 4 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -11.4300000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 5 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -8.8900000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 6 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -6.3500000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 7 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -3.8100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 8 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -1.2700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 9 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 1.2700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 10 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 3.8100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 11 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 6.3500000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 12 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 8.8900000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 13 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 11.4300000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 14 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 13.9700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 15 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 16.5100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 16 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 16.5100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 17 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 13.9700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 18 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 11.4300000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 19 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 8.8900000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 20 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 6.3500000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 21 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 3.8100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 22 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 1.2700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 23 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -1.2700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 24 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -3.8100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 25 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -6.3500000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 26 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -8.8900000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 27 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -11.4300000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 28 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -13.9700000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 29 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -16.5100000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762))
(pad 30 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -19.0500000000)
(layers *.Cu *.Mask F.SilkS)
(drill 0.762)))
(module J1
(layer F.Cu)
(tedit 5D266054)
(at 10 10)
(fp_text reference J1
(at 2.5400000000 -3.8100000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text value mpu-9250
(at 2.5400000000 -7.6200000000)
(layer F.Fab)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user VCC
(at -3.8100000000 -10.1600000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user GND
(at -3.8100000000 -7.6200000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user SCL
(at -3.8100000000 -5.0800000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user SDA
(at -3.8100000000 -2.5400000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user EDA
(at -3.8100000000 0.0000000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user ECL
(at -3.8100000000 2.5400000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user ADO
(at -3.8100000000 5.0800000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user INT
(at -3.8100000000 7.6200000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user NCS
(at -3.8100000000 10.1600000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user FSYNC
(at -2.5400000000 12.7000000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_line
(start -7.6200000000 -11.4300000000)
(end 7.5400000000 -11.4300000000)
(layer F.SilkS)
(width 0.1200000000))
(fp_line
(start 7.6200000000 -11.4300000000)
(end 7.6200000000 13.5700000000)
(layer F.SilkS)
(width 0.1200000000))
(fp_line
(start 7.6200000000 13.5700000000)
(end -7.6200000000 13.5700000000)
(layer F.SilkS)
(width 0.1200000000))
(fp_line
(start -7.6200000000 13.5700000000)
(end -7.6200000000 -11.4300000000)
(layer F.SilkS)
(width 0.1200000000))
(pad 1 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -10.1600000000)
(layers *.Cu *.Mask)
(drill 0.762)
(net 25 3v3))
(pad 2 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -7.6200000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 3 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -5.0800000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 4 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -2.5400000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 5 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 0.0000000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 6 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 2.5400000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 7 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 5.0800000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 8 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 7.6200000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 9 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 10.1600000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 10 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 12.7000000000)
(layers *.Cu *.Mask)
(drill 0.762))))
\ No newline at end of file
(session kicad_board.ses
(base_design kicad_board.dsn)
(placement
(resolution um 10)
(component U1
(place U1 1030000 -480000 front 90)
)
(component J1
(place J1 1000000 -870000 front 270)
)
)
(was_is
)
(routes
(resolution um 10)
(parser
(host_cad "KiCad's Pcbnew")
(host_version "5.1.3-ffb9f22~84~ubuntu18.04.1")
)
(library_out
(padstack "Via[0-1]_800:400_um"
(shape
(circle F.Cu 8000 0 0)
)
(shape
(circle B.Cu 8000 0 0)
)
(attach off)
)
)
(network_out
(net 3v3
(wire
(path B.Cu 10000
1101600 -806500
1101600 -687372
1040636 -626408
916058 -626408
890300 -600650
)
)
)
)
)
)
\ No newline at end of file
from skidl import Pin, Part, SchLib, SKIDL, TEMPLATE
SKIDL_lib_version = '0.0.1'
kicad_python_lib = SchLib(tool=SKIDL).add_parts(*[
Part(name='NodeMCU_1.0_',dest=TEMPLATE,tool=SKIDL,ref_prefix='U',num_units=1,do_erc=True,footprint='ESP8266.pretty:ESP12F-Devkit-V3',pins=[
Pin(num='1',name='A0(ADC0)',do_erc=True),
Pin(num='10',name='GND',do_erc=True),
Pin(num='11',name='3.3V',func=Pin.PWROUT,do_erc=True),
Pin(num='12',name='EN',do_erc=True),
Pin(num='13',name='RST',do_erc=True),
Pin(num='14',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='15',name='VIN',func=Pin.PWRIN,do_erc=True),
Pin(num='16',name='3.3V',func=Pin.PWROUT,do_erc=True),
Pin(num='17',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='18',name='TX(GPIO1)',func=Pin.BIDIR,do_erc=True),
Pin(num='19',name='RX(DPIO3)',func=Pin.BIDIR,do_erc=True),
Pin(num='2',name='RSV',do_erc=True),
Pin(num='20',name='D8(GPIO15)',func=Pin.BIDIR,do_erc=True),
Pin(num='21',name='D7(GPIO13)',func=Pin.BIDIR,do_erc=True),
Pin(num='22',name='D6(GPIO12)',func=Pin.BIDIR,do_erc=True),
Pin(num='23',name='D5(GPIO14)',func=Pin.BIDIR,do_erc=True),
Pin(num='24',name='GND',func=Pin.PWRIN,do_erc=True),
Pin(num='25',name='3.3V',func=Pin.PWROUT,do_erc=True),
Pin(num='26',name='D4(GPIO2)',func=Pin.BIDIR,do_erc=True),
Pin(num='27',name='D3(GPIO0)',func=Pin.BIDIR,do_erc=True),
Pin(num='28',name='D2(GPIO4)',func=Pin.BIDIR,do_erc=True),
Pin(num='29',name='D1(GPIO5)',func=Pin.BIDIR,do_erc=True),
Pin(num='3',name='RSV',do_erc=True),
Pin(num='30',name='D0(GPIO16)',func=Pin.BIDIR,do_erc=True),
Pin(num='4',name='SD3(GPIO10)',func=Pin.BIDIR,do_erc=True),
Pin(num='5',name='SD2(GPIO9)',func=Pin.BIDIR,do_erc=True),
Pin(num='6',name='SD1(MOSI)',func=Pin.BIDIR,do_erc=True),
Pin(num='7',name='CMD(CS)',func=Pin.BIDIR,do_erc=True),
Pin(num='8',name='SDO(MISO)',func=Pin.BIDIR,do_erc=True),
Pin(num='9',name='CLK(SCLK)',func=Pin.BIDIR,do_erc=True)]),
Part(name='MPU-9250',dest=TEMPLATE,tool=SKIDL,keywords='connector',ref_prefix='J',num_units=1,fplist=['Connector*:*_1x??_*'],do_erc=True,footprint='ESP8266.pretty:mpu-9250',pins=[
Pin(num='1',name='VCC',func=Pin.PWRIN,do_erc=True),
Pin(num='10',name='FSYNC',func=Pin.PASSIVE,do_erc=True),
Pin(num='2',name='GND',func=Pin.PASSIVE,do_erc=True),
Pin(num='3',name='SCL',func=Pin.PASSIVE,do_erc=True),
Pin(num='4',name='SDA',func=Pin.PASSIVE,do_erc=True),
Pin(num='5',name='EDA',func=Pin.PASSIVE,do_erc=True),
Pin(num='6',name='ECL',func=Pin.PASSIVE,do_erc=True),
Pin(num='7',name='ADO',func=Pin.PASSIVE,do_erc=True),
Pin(num='8',name='INT',func=Pin.PASSIVE,do_erc=True),
Pin(num='9',name='NCS',func=Pin.PASSIVE,do_erc=True)]),
Part(name='1000',dest=TEMPLATE,tool=SKIDL,keywords='R res resistor',description='Resistor',ref_prefix='R',num_units=1,fplist=['R_*'],do_erc=True,footprint='Resistor_SMD.pretty:R_0402_1005Metric',pins=[
Pin(num='1',name='~',func=Pin.PASSIVE,do_erc=True),
Pin(num='2',name='~',func=Pin.PASSIVE,do_erc=True)])])
\ No newline at end of file
Loading netlist: "/home/jingyan/Documents/summer_intern_lemur/roco_electrical/kicad_python.net"
Strong warnings:
52 Bad signal format ((comp (ref J1), (comp (ref R1), (comp (ref R2), (comp (ref U1), (components, (date "07/18/2019 12:19 PM"), (field (name description) Resistor)), (field (name keywords) "R res resistor"), (field (name keywords) connector)), (fields, (footprint Resistor_SMD.pretty:R_0402_1005Metric), (libsource (lib ESP8266) (part 1000)), (libsource (lib ESP8266) (part NodeMCU_1.0_)), (net (code 0) (name 3v3), (net (code 1) (name GND), (net (code 2) (name N$1), (net (code 3) (name N$2), (net (code 4) (name VIN), (nets, (node (ref J1) (pin 1)), (node (ref J1) (pin 2)), (node (ref J1) (pin 3)), (node (ref J1) (pin 4)), (node (ref R1) (pin 1)), (node (ref R1) (pin 2)), (node (ref R2) (pin 1)), (node (ref R2) (pin 2)), (node (ref U1) (pin 10)), (node (ref U1) (pin 11)), (node (ref U1) (pin 14)), (node (ref U1) (pin 15)))), (node (ref U1) (pin 16)), (node (ref U1) (pin 17)), (node (ref U1) (pin 22))), (node (ref U1) (pin 23))), (node (ref U1) (pin 24))), (node (ref U1) (pin 25))), (sheetpath (names /top/12130445717709598923) (tstamps /top/12130445717709598923))), (sheetpath (names /top/2029459414266585258) (tstamps /top/2029459414266585258)))), (sheetpath (names /top/4252771360195997730) (tstamps /top/4252771360195997730))), (sheetpath (names /top/6777596565628028251) (tstamps /top/6777596565628028251))), (source "/home/jingyan/Documents/summer_intern_lemur/roco_electrical/kicad_python.py"), (tool "SKiDL (0.0.26)")), (value 1K), (value NodeMCU_1.0_))
4 Bad signal-pin (9250), 9250)), Devkit-V3))
Informations:
1 Using Protel format
#!/usr/bin/env python3
import sys
sys.path.insert(1,'/home/jingyan/Documents/summer_intern_lemur/roco_electrical/dsn_python')
import dsnwritier
class brd_design():
def __init__(self,dwgfile,boundary_inx,libpath):
self.dwgfile=dwgfile
self.boundary_inx=boundary_inx
self.libpath=libpath
self.module_list=[
['mpu-9250.kicad_mod','J1',[103000,88000],270],
['ESP12F-Devkit-V3.kicad_mod','U1',[103000,48000],90],
]
self.netlist=[
['3v3',['U1-3','J1-1']],
['VIN',['U1-1']]
]
self.netclass_list=[
['default',['3v3','VIN'],'',1000,200]
]
self.brd_general()
self.boundary,self.keepout=self.load_drawing()
self.image,self.padstack=self.load_lib()
self.placement=self.place_modules()
self.net,self.netclass=self.create_net()
self.write_dsn()
def brd_general(self):
self.brd=dsnwritier.Dsn()
self.layers=[
dsnwritier.Layer('F.Cu'),
dsnwritier.Layer('B.Cu'),
dsnwritier.Layer('F.Mask'),
dsnwritier.Layer('B.Mask')
]
self.parsers= dsnwritier.Parser()
self.rule=dsnwritier.Rule()
clearance=[
dsnwritier.Clearance(200.1),
dsnwritier.Clearance(200.1,'default_smd'),
dsnwritier.Clearance(50,'smd_smd')]
self.rule.clearance=clearance
def load_drawing(self):
"""
create class: bourdry and keepout
from drawing file
"""
dwg=(dsnwritier.load_drawing(self.dwgfile)).load_polygon()
bdata=dwg.pop(self.boundary_inx)
kdata=dwg
keepout=[]
for i in range(len(kdata)):
keep_class=dsnwritier.Keepout(kdata[i])
keepout.append(keep_class)
boundary=dsnwritier.Boundary(bdata)
return boundary,keepout
def load_lib(self):
"""
create class: footprint (image) and padstack
from library path and modules
"""
image=[]
for mod in self.module_list:
img=dsnwritier.Footprint.from_file(self.libpath+mod[0],ref=mod[1])
image.append(img)
padstack=dsnwritier.Padstack.auto_detect(self.libpath+'mpu-9250.kicad_mod')
return image,padstack
def place_modules(self):
placement=[]
for mod in self.module_list:
place=dsnwritier.Placement(name=mod[0],ref1=mod[1],at=mod[2],orientation=mod[3])
placement.append(place)
return placement
def create_net(self):
nets_list=[]
netclass_list=[]
for net in self.netlist:
nets=dsnwritier.Net(net_name=net[0],conn_pins=net[1])
nets_list.append(nets)
for netclass in self.netclass_list:
netclasses=dsnwritier.NetClass(net_class_name=netclass[0],
nets_name=netclass[1],
via_name=netclass[2],
width=netclass[3],
clearance=netclass[4])
netclass_list.append(netclasses)
return nets_list,netclass_list
def write_dsn(self):
self.brd.parser=self.parsers
self.brd.rule=self.rule
self.brd.layers=self.layers
self.brd.boundary=self.boundary
self.brd.keepout=self.keepout
self.brd.image=self.image
self.brd.padstack=self.padstack
self.brd.placement=self.placement
self.brd.net=self.net
self.brd.netclass=self.netclass
self.brd.to_file('paperbot_ee.dsn')
libpath='/home/jingyan/Documents/summer_intern_lemur/roco_electrical/libraries/kicad-ESP8266/ESP8266.pretty/'
dwgfile='/home/jingyan/Documents/summer_intern_lemur/roco_electrical/dsn_line_test.dxf'
a= brd_design(dwgfile,0,libpath)
File added
#!/usr/bin/env python3
import sys
sys.path.insert(1,'/home/jingyan/Documents/summer_intern_lemur/roco_electrical/dsn_python')
import dsnwritier
class brd_design():
def __init__(self,dwgfile,boundary_inx,libpath):
self.dwgfile=dwgfile
self.boundary_inx=boundary_inx
self.libpath=libpath
self.module_list=[
['mpu-9250.kicad_mod','J1',[103000,88000],270],
['ESP12F-Devkit-V3.kicad_mod','U1',[103000,48000],90],
]
self.netlist=[
['3v3',['U1-3','J1-1']],
['VIN',['U1-1']]
]
self.netclass_list=[
['default',['3v3','VIN'],'',1000,200]
]
self.brd_general()
self.boundary,self.keepout=self.load_drawing()
self.image,self.padstack=self.load_lib()
self.placement=self.place_modules()
self.net,self.netclass=self.create_net()
self.write_dsn()
def brd_general(self):
self.brd=dsnwritier.Dsn()
self.layers=[
dsnwritier.Layer('F.Cu'),
dsnwritier.Layer('B.Cu'),
dsnwritier.Layer('F.Mask'),
dsnwritier.Layer('B.Mask')
]
self.parsers= dsnwritier.Parser()
self.rule=dsnwritier.Rule()
clearance=[
dsnwritier.Clearance(200.1),
dsnwritier.Clearance(200.1,'default_smd'),
dsnwritier.Clearance(50,'smd_smd')]
self.rule.clearance=clearance
def load_drawing(self):
"""
create class: bourdry and keepout
from drawing file
"""
dwg=(dsnwritier.load_drawing(self.dwgfile)).load_polygon()
bdata=dwg.pop(self.boundary_inx)
kdata=dwg
keepout=[]
for i in range(len(kdata)):
keep_class=dsnwritier.Keepout(kdata[i])
keepout.append(keep_class)
boundary=dsnwritier.Boundary(bdata)
return boundary,keepout
def load_lib(self):
"""
create class: footprint (image) and padstack
from library path and modules
"""
image=[]
for mod in self.module_list:
img=dsnwritier.Footprint.from_file(self.libpath+mod[0],ref=mod[1])
image.append(img)
padstack=dsnwritier.Padstack.auto_detect(self.libpath+'mpu-9250.kicad_mod')
return image,padstack
def place_modules(self):
placement=[]
for mod in self.module_list:
place=dsnwritier.Placement(name=mod[0],ref1=mod[1],at=mod[2],orientation=mod[3])
placement.append(place)
return placement
def create_net(self):
nets_list=[]
netclass_list=[]
for net in self.netlist:
nets=dsnwritier.Net(net_name=net[0],conn_pins=net[1])
nets_list.append(nets)
for netclass in self.netclass_list:
netclasses=dsnwritier.NetClass(net_class_name=netclass[0],
nets_name=netclass[1],
via_name=netclass[2],
width=netclass[3],
clearance=netclass[4])
netclass_list.append(netclasses)
return nets_list,netclass_list
def write_dsn(self):
self.brd.parser=self.parsers
self.brd.rule=self.rule
self.brd.layers=self.layers
self.brd.boundary=self.boundary
self.brd.keepout=self.keepout
self.brd.image=self.image
self.brd.padstack=self.padstack
self.brd.placement=self.placement
self.brd.net=self.net
self.brd.netclass=self.netclass
self.brd.to_file('paperbot_ee.dsn')
libpath='/home/jingyan/Documents/summer_intern_lemur/roco_electrical/libraries/kicad-ESP8266/ESP8266.pretty/'
dwgfile='/home/jingyan/Documents/summer_intern_lemur/roco_electrical/dsn_line_test.dxf'
a= brd_design(dwgfile,0,libpath)
...@@ -16,8 +16,16 @@ ...@@ -16,8 +16,16 @@
(type signal) (type signal)
(property (property
(index 1))) (index 1)))
(layer F.Mask
(type signal)
(property
(index 2)))
(layer B.Mask
(type signal)
(property
(index 3)))
(boundary (boundary
(path pcb 1 -26696.2760000000 -280310.9110000000 216684.7830000000 -280310.9110000000 216684.7830000000 19577.2840000000 -26696.2760000000 19577.2840000000)) (path pcb 0 -26696.2760000000 -280310.9110000000 216684.7830000000 -280310.9110000000 216684.7830000000 19577.2840000000 -26696.2760000000 19577.2840000000))
(keepout "" (keepout ""
( polygon signal 0 106000.2480000000 -113732.1160000000 106000.2480000000 -113467.5320000000 118999.9710000000 -113467.5320000000 118999.9710000000 -113732.1160000000)) ( polygon signal 0 106000.2480000000 -113732.1160000000 106000.2480000000 -113467.5320000000 118999.9710000000 -113467.5320000000 118999.9710000000 -113732.1160000000))
(keepout "" (keepout ""
...@@ -290,12 +298,12 @@ ...@@ -290,12 +298,12 @@
(clearance 50 (clearance 50
(type smd_smd)))) (type smd_smd))))
(placement (placement
(component J1
(place J1 103000 -88000 front 270
(PN mpu-9250.kicad_mod)))
(component U1 (component U1
(place U1 103000 -48000 front 90 (place U1 103000 -48000 front 90
(PN "DEV"))) (PN ESP12F-Devkit-V3.kicad_mod))))
(component J1
(place J1 103000 -48000 front 270
(PN "DEV"))))
(library (library
(image J1 (image J1
(outline (outline
...@@ -386,9 +394,9 @@ ...@@ -386,9 +394,9 @@
(pins U1-3 J1-1)) (pins U1-3 J1-1))
(net VIN (net VIN
(pins U1-1)) (pins U1-1))
(class default 3v3 GND VIN (class default 3v3 VIN
(circuit (circuit
(use_via Via[0-1]_800:400_um)) (use_via ""))
(rule (rule
(width 1000) (width 1000)
(clearance 200.1000000000))))) (clearance 200)))))
\ No newline at end of file \ No newline at end of file
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