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Commit bf5c4592 authored by Jingyan Ling's avatar Jingyan Ling
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scripting autorouter

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pcb_design_test.py deleted 100644 → 0
+ 0
− 69
View file @ 5a6f9c5a
from numpy import array
from pykicad.pcb import *
from pykicad.module import *
# Define nets
vi, vo, gnd = Net('VI'), Net('VO'), Net('GND')
# Load footprints
r1 = Module.from_library('ESP8266','ESP12F-Devkit-V3')
r2 = Module.from_library('ESP8266','mpu-9250')
# Connect pads
r1.pads[0].net = vi
r1.pads[1].net = vo
r2.pads[0].net = r1.pads[1].net
r2.pads[1].net = gnd
# Place components
r1.at = [0, 0]
r2.at = [15, 15]
# Compute positions
start = array(r1.pads[1].at) + array(r1.at)
end = array(r2.pads[0].at) + array(r2.at)
pos = start + (end - start) / 2
# Create vias
# v1 = Via(at=pos.tolist(), size=.8, drill=.6, net=vo.code)
# Create segments
s1 = Segment(start=start.tolist(), end=pos.tolist(), net=vo.code)
s2 = Segment(start=pos.tolist(), end=end.tolist(), net=vo.code)
# Create zones
# coords = [(0, 0), (10, 0), (10, 10), (0, 10)]
# gndplane_top = Zone(net_name='GND', layer='F.Cu', polygon=coords, clearance=0.3)
layers = [
Layer('F.Cu'),
Layer('Inner1.Cu'),
Layer('Inner2.Cu'),
Layer('B.Cu'),
Layer('Edge.Cuts', type='user')
]
for layer in ['Mask', 'Paste', 'SilkS', 'CrtYd', 'Fab']:
for side in ['B', 'F']:
layers.append(Layer('%s.%s' % (side, layer), type='user'))
nc1 = NetClass('default', trace_width=1, nets=['VI', 'VO', 'GND'])
# Create PCB
pcb = Pcb()
# pcb.title = 'A title'
# pcb.comment1 = 'Comment 1'
# pcb.page_type = [100, 100]
pcb.num_nets = 5
# pcb.setup = Setup(grid_origin=[10, 10])
pcb.layers = layers
pcb.modules += [r1, r2]
pcb.net_classes += [nc1]
pcb.nets += [vi, vo, gnd]
pcb.segments += [s1, s2]
# pcb.vias += [v1]
# pcb.zones += [gndplane_top]
pcb.to_file('project.kicad_pcb')
\ No newline at end of file
pcbnew_temp.py deleted 100644 → 0
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pcbnew_temp.pyc deleted 100644 → 0
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File deleted
project.kicad_pcb deleted 100644 → 0
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(kicad_pcb
(version 1)
(host pykicad x.x.x)
(general
(nets 5))
(layers
( 8 F.Cu signal)
( 9 Inner1.Cu signal)
( 10 Inner2.Cu signal)
( 11 B.Cu signal)
( 54 Edge.Cuts user)
( 55 B.Mask user)
( 56 F.Mask user)
( 57 B.Paste user)
( 58 F.Paste user)
( 59 B.SilkS user)
( 60 F.SilkS user)
( 61 B.CrtYd user)
( 62 F.CrtYd user)
( 63 B.Fab user)
( 64 F.Fab user))
(net 7 VI)
(net 8 VO)
(net 9 GND)
(net_class default ""
(trace_width 1) (add_net VI) (add_net VO) (add_net GND))
(module ESP12F-Devkit-V3
(layer F.Cu)
(tedit 5B8C418D)
(at 0 0)
(fp_text reference REF**
(at 0.6350000000 -1.2700000000)
(layer F.SilkS)
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(fp_text user USB
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(layer F.SilkS)
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(fp_text user "RF Antenna"
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(layer F.SilkS)
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(layer F.SilkS)
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(fp_line
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(layer F.SilkS)
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(fp_line
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(layer F.SilkS)
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(fp_line
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(fp_line
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(layer F.SilkS)
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(fp_line
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(layer F.SilkS)
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(fp_line
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(layer F.SilkS)
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(fp_line
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(end -13.3350000000 21.5900000000)
(layer F.SilkS)
(width 0.1500000000))
(fp_line
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(end -12.0650000000 22.8600000000)
(layer F.SilkS)
(width 0.1500000000))
(fp_line
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(layer F.SilkS)
(width 0.1500000000))
(fp_circle
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(layer F.SilkS)
(width 0.1500000000))
(fp_circle
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(end -9.5250000000 19.0500000000)
(layer F.SilkS)
(width 0.1500000000))
(fp_circle
(center -10.7950000000 -22.8600000000)
(end -9.5250000000 -24.1300000000)
(layer F.SilkS)
(width 0.1500000000))
(fp_circle
(center 10.1600000000 -22.8600000000)
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(layer F.SilkS)
(width 0.1500000000))
(fp_arc
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(width 0.1500000000))
(fp_arc
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(layers *.Cu *.Mask F.SilkS)
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(pad 2 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -12.0650000000 -16.5100000000)
(layers *.Cu *.Mask F.SilkS)
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(pad 3 thru_hole circle
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(pad 4 thru_hole circle
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(pad 10 thru_hole circle
(size 1.5240000000 1.5240000000)
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(pad 30 thru_hole circle
(size 1.5240000000 1.5240000000)
(at 11.4300000000 -19.0500000000)
(layers *.Cu *.Mask F.SilkS)
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(module mpu-9250
(layer F.Cu)
(tedit 5D266054)
(at 15 15)
(fp_text reference REF**
(at 2.5400000000 -3.8100000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text value mpu-9250
(at 2.5400000000 -7.6200000000)
(layer F.Fab)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user VCC
(at -3.8100000000 -10.1600000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user GND
(at -3.8100000000 -7.6200000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user SCL
(at -3.8100000000 -5.0800000000)
(layer F.SilkS)
(effects
(font
(size 1.0000000000 1.0000000000)
(thickness 0.1500000000))))
(fp_text user SDA
(at -3.8100000000 -2.5400000000)
(layer F.SilkS)
(effects
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(fp_text user EDA
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(layer F.SilkS)
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(layer F.SilkS)
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(fp_text user FSYNC
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(layer F.SilkS)
(effects
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(fp_line
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(fp_line
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(end 7.6200000000 13.5700000000)
(layer F.SilkS)
(width 0.1200000000))
(fp_line
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(layer F.SilkS)
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(fp_line
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(layer F.SilkS)
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(pad 1 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -10.1600000000)
(layers *.Cu *.Mask)
(drill 0.762)
(net 8 VO))
(pad 2 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -7.6200000000)
(layers *.Cu *.Mask)
(drill 0.762)
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(pad 3 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -5.0800000000)
(layers *.Cu *.Mask)
(drill 0.762))
(pad 4 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 -2.5400000000)
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(drill 0.762))
(pad 5 thru_hole circle
(size 1.5240000000 1.5240000000)
(at -6.3500000000 0.0000000000)
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(pad 6 thru_hole circle
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(pad 10 thru_hole circle
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(segment
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(end -1.7075000000 -5.8350000000)
(layer F.Cu)
(net 8))
(segment
(start -1.7075000000 -5.8350000000)
(end 8.6500000000 4.8400000000)
(layer F.Cu)
(net 8)))
\ No newline at end of file
project.pro deleted 100644 → 0
+ 0
− 33
View file @ 5a6f9c5a
update=22/05/2015 07:44:53
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
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